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EIS der TU Braunschweig
Hardware-Software-Systems
  • Teaching
    • Overview
    • Advanced FPGA-Design
    • Application-Specific Instruction-Set Processors (ASIP)
    • Memory Systems
    • Hardware-Praktikum
    • VLSI-Lab
    • VLSI-Design
    • Hardware-Software-Systems
    • Verification, Validation and Testing of ASIC Designs
    • ASIP-Lab
    • Software-Entwicklungspraktikum: Smart-V

Hardware-Software-Systems

Organisation

  • Diese Veranstaltung wird in deutscher Sprache unterrichtet.
  • Diese Veranstaltung richtet sich an Bachelor-Studierende.
  • Eintrag im Vorlesungsverzeichnis
  • Die Vorlesung wird von Prof. Dr. Guillermo Payá Vayá gehalten. Die Übung wird von den wissenschaftlichen Mitarbeitern betreut.
  • Dienstags: 16:45 bis 18:15 Uhr (Vorlesung), Freitags: 13:15 bis 14:45 Uhr (Übung)

Beschreibung

Diese Vorlesung behandelt das klassische Hardware-Software-Codesign. Die Studierenden bekommen einen Einblick wie Hardware mit Standard-Software kommuniziert und gewinnen Einblicke in das Zusammenspiel von Hardware und Software. Ein wesentlicher Teil der Vorlesung fokussiert sich auf die Beschreibung von Hardwareschaltungen mithilfe sogenannter Hardwarebeschreibungssprachen (VHDL) und deren effizienter Realisierung auf FPGAs mit aktuellen Entwicklungsmethoden. Außerdem wird auch ein Überblick auf den Design-Flow für ASICs gegeben. Die Vorlesung schließt mit aktuellen Trends in der High-Level-Synthese ab.

Inhalte

  • Einleitung und Zielarchitekturen für HW/SW-Systeme
  • Hardware-Beschreibungssprachen
  • VHDL-Entwurf Digitaler Schaltungen und Systeme
  • Synthese und Implementierung synchroner Schaltungen
  • FPGA-Entwurftechnik (Design-Flow)
  • ASIC-Design (Flow, Full-Custom, Semi-Custom, Layout)
  • High-Level Synthese

Prüfungsleistung

  • schriftliche Klausur (90 Minuten)

Literatur

  • Ming-Bo Lin: Introduction to VLSI Systems. A logic, circuit and system perspective. 1st edition. CRC Press, 2012.
  • Douglas J. Smith: HDL Chip Design: A Practical Guide for Designing, Synthesizing, and Simulating ASICs and FPGAs Using VHDL Or Verilog. Doone Publications,1998.
  • Brian Bailey, Grant Martin: ESL Models and their Application. Electronic System Level Design and Verification inPractice.Springer Verlag, 2010.
  • Skript und multimediale Lernprogramme
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