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EIS der TU Braunschweig
Application-Specific Instruction-Set Processors (ASIP)
  • Teaching
    • Overview
    • Advanced FPGA-Design
    • Application-Specific Instruction-Set Processors (ASIP)
    • Memory Systems
    • Hardware-Praktikum
    • VLSI-Lab
    • VLSI-Design
    • Hardware-Software-Systems
    • Verification, Validation and Testing of ASIC Designs
    • ASIP-Lab
    • Software-Entwicklungspraktikum: Smart-V

Application-Specific Instruction-Set Processors (ASIP)

The lecture and exercise of ASIP starts April 15th in the sommer semester 2025

Organization

  • This course will be held in English.
  • This course is intended for master's students.
  • The lecture is held by Prof. Dr. Guillermo Payá Vayá. The exercise is supervised by the research assistants.
  • Entry in the official course directory.
  • The lecture is is held in presence, Tuesday 13:15 to 14:45, Raum IZ 161, Gebaeude Mühlenpfordtstraße 23 (4103).
  • The exercise takes place Tuesday after the lecture, 15:00 to 16:30.

Description

After completing the module, the students know how to customize and optimize a processor architecture (instruction, data and task level parallelism). They are capable of implementing application-specific instruction set processors (ASIPs). They can implement arithmetic-oriented hardware extensions and know new development tendencies of processors, e.g., highly parallel processors and reconfigurable processors.

 

Contents

  • Introduction to Embedded Computer Architectures
  • Fundamentals of Processor Design
  • Application-Specific Instruction-Set Processor (ASIP)
  • Instruction- and Data-Level Parallelism
  • Graphic Processing Unit (GPU)
  • Tensor Processing Unit (TPU) and Neural Processing Unit (NPU)
  • Reconfigurable Processor Architectures
  • Fault-Tolerant Processor Architectures
  • Low-Power Processor Architectures
  • Approximate and Stochastic Processor Architectures
  • Cryptographic Processor Architectures

Oral Examination

The examination will be an oral examination. Dates will be announced in the course during the semester.

 

Literature

  • Gries, M.; Keutzer, K.; "Building ASIPS: The Mescal Methodology", Springer, 2010
  • Leibson, S.: "Designing SOCs with Configured Cores. Unleashing the Tensilica Xtensa and Diamond Cores", Morgan Kaufmann, 2006
  • Henkel, J.; Parameswaran, S.:"Designing Embedded Processors", Springer, 2007
  • Nurmi, J.: "Processor Design. System-On-Chip Computing for ASICs and FPGAs", Springer, 2007
  • Flynn, M. J.; Luk, W.: "Computer System Design. System-on-Chip", Wiley, 2011
  • González, A.; Latorre, F.; Magklis, G.: "Processor Microarchitecture: An Implementation Perspective", Morgan&Claypool Publishers, 2010
  • Fisher, J.; Faraboschi, P.; Young, C.: "Embedded Computing: A VLIW Approach to Architecture, Compilers, and Tools", Morgan Kaufmann, 2005.
  • Hennessy, J.L.; Patterson, D. A.; "Computer Architecture: A Quantitative Approach", Morgan Kaufmann, 2011.
  • Leuppers, R.; Marwedel, P.: "Retargetable Compiler Technology for Embedded Systems: Tools and Applications", Springer, 2010
  • Jacob, B.; "The Memory System: You Can't Avoid It, You Can't Ignore It, You Can't Fake It", Morgan&Claypool Publishers, 2009
  • Kaxiras, S.: Martonosi, M.: "Computer Architecture Techniques for Power-Efficiency ", Morgan&Claypool Publishers, 2008
  • Olukotun, K.; Hammond, L.; Laudon, J.; "Chip Multiprocessor Architecture: Techniques to Improve Throughput and Latency ", Morgan&Claypool Publishers, 2007
  • Zaccaria, V.; Sami, M.G.; Silvano, C.: "Power Estimation and Optimization Methodologies for VLIW-based Embedded Systems", Springer, 2003
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