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EIS der TU Braunschweig
Chair for Chip Design for Embedded Computing
  • Chair for Chip Design for Embedded Computing
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Chair for Chip Design for Embedded Computing

The Chair for Chip Design for Embedded Computing (C3E) is led by Prof. Guillermo Payá Vayá. We are a part of the Institute of Theoretical Computer Science.
The mission of C3E is to contribute to the advancement of application-specific computing by proposing new methods and techniques to increase the efficiency of current processor architectures, for example, in terms of silicon area or power consumption.

The main research areas are:

  • Application-Specific Instruction-Set Processors, which includes high-performance processors, (ultra-)low-power processors, dynamically reconfigurable processors or fault-tolerant processors.
  • Memory Systems, including specialized direct memory controllers or processing-in-memory architectures.
  • Efficient hardware accelerators for FPGA and ASIC
  • Electronic System-Level design tools for application-Specific HW/SW systems
  • Software development tools (e.g. compiler backend, virtual prototyping, fast simulators)
  • Hardware verification methods

The cooperation with industrial partners is of key importance for the C3E. We can supply the state-of-the-art technology, innovation, and expert knowledge for industry unresolved problems. The C3E offers individual consultation/training as well as technology transfer in the abovementioned research areas.

Events

26.10.2026

Presentation BA Haase

10:30 am in room 262A
Topic: “Implementation and Evaluation of a Pruning Framework for a Massively Parallel, Vertical Vector Processor Architecture”

08.03.2027

Hardware-Software-Systems Exam

Time: 01:00 PM - 03:30 PM (Exam starts at 01:30 PM)
Room: 4202.01.101 - AudiMax

News

Jasper Homann presents OpenFI4ASIC to the audience at SafeComp 2026 in Valencia.

02.10.2026

Jasper Homann at SafeComp 2026 in Valencia

On 23 September 2026, Jasper Homann presented “OpenFI4ASIC: An Open-Source Fault Injection Framework for ASIC Designs via FPGA-Based Rapid…

Two people stand in front of LeoVan, TU Braunschweig’s mobile school laboratory.

01.10.2026

EIS inaugurates LeoVan

Together with TU Braunschweig’s physics education team, TU Braunschweig’s Transfer Service and Haus der Wissenschaft, EIS inaugurated LeoVan.…

[Translate to English:] Das EIS zeigt eine Live-Demonstration zur Bilderkennung bei der 25-Jahr-Feier des L3S

21.09.2026

EIS at the L3S 25th Anniversary Celebration in Herrenhausen Gardens

At the celebration of L3S’s 25th anniversary at Herrenhausen Gardens, EIS presented a small live demonstration of real-time person and object…

16.09.2026

Moritz Weißbrich presents the NanoLogicController at ASAP 2026

Moritz Weißbrich presents the NanoLogicController at ASAP 2026. The paper “NanoLogicController: A Minimal Open-Source ASIP for Accelerated Gate-Level…

C3E at HIT 2026

29.05.2026

C3E at HIT 2026

At the 2026 University Information Day, C3E once again offered exciting insights into its current research projects as well as the hardware lab…

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