co-located with
ETAPS'16

Important Dates
Keynote
Program
Topics
Submission & Publication
Program Chairs
Program Committee
Steering Committee
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7th International Workshop on Formal Methods and Analysis in Software Product Line Engineering (FMSPLE'16)

Proceedings available online since March 29, 2016.

April 3, 2016, Eindhoven, The Netherlands

In Software Product Line Engineering (SPLE), a portfolio of similar systems is developed from a shared set of software assets. Claimed benefits of SPLE include reductions in the portfolio size, cost of software development and time to production, as well as improvements in the quality of the delivered systems. Yet, despite these benefits, SPLE is still in the early adoption stage. We believe that automated approaches, tools and techniques that provide better support for SPLE activities can further facilitate its adoption in practice and increase its benefits.

To promote work in this area, the FMSPLE’16 workshop focuses on automated analysis and formal methods, which can (1) lead to a further increase in development productivity and reduction in maintenance costs associated with management of the SPLE artifacts, and (2) provide proven guarantees for the correctness and quality of the delivered systems. More specifically, the workshop aims at reviewing the state-of-the-art and the state-of-the-practice of analyses and formal methods for SPLE. It also aims at soliciting examples for successful deployment of such technique and discussing a research agenda for the next steps. To achieve these objectives, the workshop is planned as a highly interactive event initiating and fostering discussion between the participants with different views and backgrounds.

The workshop will start with a keynote talk by Prof. Krzysztof Czarnecki. We will then proceed to presentations of the accepted, peer-reviewed papers and a set of interactive discussions.

Important Dates

Keynote

We are happy to announce that Prof. Krzysztof Czarnecki from University of Waterloo will give a keynote at FMSPLE'16.

Title

Reasoning about Product Lines of Cyber-Physical Systems with Clafer

Abstract

Cyber-physical systems (CPS) combine complex machines, computers, networks, and people and are poised to change how we interact with the physical world. Example CPS include self-driving cars and intelligent buildings. Elements of CPS are often engineered as product lines in order to fit different contexts and markets. Computer modeling is essential to engineering such systems as analyzing and evolving virtual blueprints is easier and more cost-effective than performing these tasks on physical models or systems.

Clafer is a lightweight modeling language for modeling CPS architecture with dedicated support for variability modeling. I will illustrate a range of modeling and analysis tasks that can be performed using Clafer, including synthesis and multi-objective optimization of architectures and behavioral modeling and analysis in the presence of product-line variability. I will also discuss how domain-specific languages can be built on top of Clafer in order to improve usability for a given application domain. I will close with discussion of research challenges and suggestions for future work.

Short Biography

Krzysztof Czarnecki is a Professor of Electrical and Computer Engineering at the University of Waterloo. Before coming to Waterloo, he was a researcher at DaimlerChrysler Research (1995-2002), Germany, focusing on improving software development practices and technologies in enterprise, automotive, and aerospace domains. He co-authored the book on "Generative Programming" (Addison- Wesley, 2000), which deals with automating software component assembly based on domain-specific languages. While at Waterloo, he held the NSERC/Bank of Nova Scotia Industrial Research Chair in Requirements Engineering of Service-oriented Software Systems (2008-2013) and has worked on a range of topics in model-driven systems and software engineering, including product line engineering, design exploration and synthesis, variability modeling, model transformation, and domain-specific languages. He has also helped automotive and aerospace companies introduce effective product-line engineering practices. He received the Premier's Reseach Excellence Award in 2004 and the British Computing Society in Upper Canada Award for Outstanding Contributions to IT Industry in 2008. He currently leads the NSERC CREATE in Product Line Engineering for Cyber-physical Systems, a $2.7 million industry-oriented graduate research and training program at the University of Waterloo.

Program

Session 1: Product-Line Refactoring (Chair: Malte Lochau)
09:30-10:00 Thomas Thüm Opening and Introduction Round
10:00-10:30 Ferruccio Damiani and Michael Lienhardt Refactoring Delta-Oriented Product Lines to Achieve Monotonicity
Coffee break
Keynote (Chair: Thomas Thüm)
11:00-12:30 Krzysztof Czarnecki Reasoning about Product Lines of Cyber-Physical Systems with Clafer
Lunch
Session 2: Product-Line Verification (Chair: Michael Lienhardt)
02:00-02:30 Matthias Kowal and Ina Schaefer Incremental Consistency Checking in Delta-Oriented UML-Models for Automation Systems
02:30-03:00 Maurice H. ter Beek, Erik P. de Vink, and Tim A. C. Willemse Towards a Feature Mu-Calculus Targeting SPL Verification
Coffee break
Session 3: Feature-Model Analysis (Chair: Maurice ter Beek)
03:30-04:00 Frederik Deckwerth, Géza Kulcsár, Malte Lochau, Gergely Varro, and Andy Schürr Conflict Detection for Edits on Extended Feature Models using Symbolic Graph Transformation
04:00-04:30 Anjali Sree Kumar, Robert Clarisó, and Elena Planas Analysis of Feature Models Using Alloy: A Survey

Topics

The workshop focuses on the application of formal methods and automated analyses in all phases of SPLE, including design, development and testing of software products in domain and application engineering. The topics of interest include, but are not limited to:

Submission and Publication

The proceedings of FMSPLE will be published as a volume of the Electronic Proceedings in Theoretical Computer Science (EPTCS). We invite research papers containing novel and previously unpublished results, including experiments, experience reports, reports of industrial case studies, tool descriptions, and short papers describing work in progress or exploratory ideas. All papers have to follow the EPTCS conference proceedings format (Letter) and be 6-15 pages (extended from 6-12 pages) of length.

The papers should be submitted via EasyChair and will be reviewed by at least three members of the program committee. The program committee will select the best papers based on quality, relevance to the workshop, and potential to initiate discussions for presentation.

Program Chairs

Program Committee

Steering Committee

Previous Editions