TU BRAUNSCHWEIG

Rainer Buchty Rainer Buchty

Dr. rer. nat., Diplom-Informatiker (Dipl.-Inform.)

Technische Universität Braunschweig
Abteilung Technische Informatik, E.I.S.
Mühlenpfordtstr. 23
D-38106 Braunschweig

Postfach 3329
D-38023 Braunschweig

Telefon +49 531/391-2390
Fax +49 531/391-2375
E-Mail buchty@c3e.cs.tu-bs.de
Raum extern

Publikationen

Journal Articles by R. Buchty


R. Meyer, J. Wagner, B. Farkas, S. Horsinka, P. Siegl, R. Buchty, and M. Berekovic
A Scriptable Standard-Compliant Reporting and Logging Framework for SystemC
ACM Trans. Embed. Comput. Syst., 16(1), 2016
URL, DOI, RIS, BibTex
R. Buchty
Reconfigurable ROS-based Resilient Reasoning Robotic Cooperating Platforms -- R5-COP
The Parliament Magazine, 423, 40-41, 2015
URL, RIS, BibTex
M. Kicherer, F. Nowak, R. Buchty, and W. Karl
Seamlessly portable applications: Managing the diversity of modern heterogeneous systems
ACM Transactions on Architecture and Code Optimization (TACO), 8, 2012
RIS, BibTex
R. Buchty, V. Heuveline, W. Karl, and J.-P. Weiß
A survey on hardware-aware and heterogeneous computing on multicore processors and accelerators
Concurrency and Computation: Practice and Experience, 2011
URL, DOI, RIS, BibTex
R. Buchty and W. Karl
Design Aspects of Self-Organizing Heterogeneous Multi-Core Architectures
it Information Technology 5/2008 (Issue on Computer Architecture Challenges), 293-299, 2008
RIS, BibTex
J. Tao, M. Kunze, F. Nowak, R. Buchty, and W. Karl
Performance Advantage of Reconfigurable Cache Design on Multicore Processor Systems
International Journal of Parallel Programming, 36(3), 2008
RIS, BibTex

Conference Papers


B. Farkas, S. A. A. Shah, J. Wagner, R. Meyer, R. Buchty, and M. Berekovic
An Open and Flexible SystemC to VHDL Workflow for Rapid Prototyping
Design and Verification Conference (DVCon) Europe 2016, October 19 - 20, 2016 Munich, Germany, 2016
RIS, BibTex
P. Siegl, R. Buchty, and M. Berekovic
Data-Centric Computing Frontiers: A Survey On Processing-In-Memory
Proceedings of the 2016 International Symposium on Memory Systems, ACM, 2016, ISBN 978-1-4503-4305-3
URL, DOI, ISBN, RIS, BibTex
P. Siegl, R. Buchty, and M. Berekovic
Towards Bridging the Gap Between Academic and Industrial Heterogeneous System Architecture Design Space Exploration
Proceedings of the 2016 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, ACM, 2016, ISBN 978-1-4503-4072-4
URL, DOI, ISBN, RIS, BibTex
P. Siegl, R. Buchty, B. Farkas, S. A. Horsinka, R. Meyer, J. Wagner, and M. Berekovic
The Past, Present and Future of the Open-Source Virtual Platform SoCRocket
Workshop EMC2: Mixed Criticality Applications and Implementation Approaches, 2016
RIS, BibTex
R. Meyer, J. Wagner, R. Buchty, and M. Berekovic
Universal Scripting Interface for SystemC
DVCon Europe Conference Proceedings 2015, 2015
URL, RIS, BibTex
J. Wagner, R. Meyer, R. Buchty, and M. Berekovic
A scriptable, standards-compliant reporting and logging extension for SystemC
Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), 2015 International Conference on, 2015
URL, DOI, RIS, BibTex
P. Siegl, R. Buchty, and M. Berekovic
Revealing Potential Performance Improvements By Utilizing Hybrid Work-Sharing For Resource-Intensive Seismic Applications
Proceedings of the 2015 23rd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, IEEE Computer Society, 2015, ISBN 978-1-4799-8490-9
URL, DOI, ISBN, RIS, BibTex
T. Schuster, R. Meyer, R. Buchty, L. Fossati, and M. Berekovic
SoCRocket - A virtual platform for the European Space Agency's SoC development
Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2014 9th International Symposium on, 2014
DOI, RIS, BibTex
S. A. Horsinka, R. Meyer, J. Wagner, R. Buchty, and M. Berekovic
On RTL to TLM Abstraction to Benefit Simulation Performance and Modeling Productivity in NoC Design Exploration
NoCArc '14: Proceedings of the 2014 International Workshop on Network on Chip Architectures, ACM, 2014, ISBN 978-1-4503-3064-0
DOI, ISBN, RIS, BibTex
J. Wagner, R. Buchty, C. Schubert, and M. Berekovic
Designing a low-power wireless sensor node rASIP architecture
Signal Processing Systems (SiPS), 2013 IEEE Workshop on, 2013
DOI, RIS, BibTex
B. Motruk, J. Diemer, R. Buchty, and M. Berekovic
Power monitoring for mixed-criticality on a many-core platform
ARCS'13: Proceedings of the 26th international conference on Architecture of Computing Systems, Springer-Verlag, 2013, ISBN 978-3-642-36423-5
DOI, ISBN, RIS, BibTex
B. Motruk, J. Diemer, P. Axer, R. Buchty, and M. Berekovic
Safe Virtual Interrupts Leveraging Distributed Shared Resources and Core-to-Core Communication on Many-Core Platforms
PRDC '13: Proceedings of the 2013 IEEE 19th Pacific Rim International Symposium on Dependable Computing, IEEE Computer Society, 2013, ISBN 978-0-7695-5130-2
DOI, ISBN, RIS, BibTex
H. Al-Khalissi, R. Buchty, and M. Berekovic
Efficient Barrier Synchronization for OpenMP-Like Parallelism on the Intel SCC
ICPADS '13: Proceedings of the 2013 International Conference on Parallel and Distributed Systems, IEEE Computer Society, 2013, ISBN 978-1-4799-2081-5
DOI, ISBN, RIS, BibTex
B. Motruk, J. Diemer, R. Buchty, R. Ernst, and M. Berekovic
IDAMC: A Many-Core Platform with Run-Time Monitoring for Mixed-Criticality
HASE '12: Proceedings of the 2012 IEEE 14th International Symposium on High-Assurance Systems Engineering, IEEE Computer Society, 2012, ISBN 978-0-7695-4912-5
DOI, ISBN, RIS, BibTex
M. Kicherer, R. Buchty, and W. Karl
Cost-aware function migration in heterogeneous systems
Proceedings of the 6th International Conference on High Performance and Embedded Architectures and Compilers, ACM, 2011, ISBN 978-1-4503-0241-8
URL, DOI, ISBN, RIS, BibTex
D. Kramer, R. Buchty, and W. Karl
A Light-Weight Approach for Online State Classification of Self-organizing Parallel Systems
Architecture of Computing Systems - ARCS 2011, Springer Berlin / Heidelberg, 2011
DOI, RIS, BibTex
F. Nowak, M. Kicherer, R. Buchty, and W. Karl
Delivering Guidance Information in Heterogeneous Systems
ARCS 2010 Workshop Proceedings, VDE, 2010, ISBN 978-3-8007-3222-7
ISBN, RIS, BibTex
M. Kicherer, F. Nowak, R. Buchty, and W. Karl
Extending a Light-weight Runtime System by Dynamic Instrumentation For Performance Evaluation
ARCS 2010 Workshop Proceedings, VDE, 2010, ISBN 978-3-8007-3222-7
ISBN, RIS, BibTex
O. Mattes and R. Buchty
A Universal Framework for Simulating Hierarchical Network Topologies in a Distributed Memory System
Parallel-Algorithmen, -Rechnerstrukturen und -Systemsoftware, Gesellschaft für Informatik e.V., 2009
RIS, BibTex
D. Kramer, R. Buchty, and W. Karl
A Scalable and Decentral Approach to sustained System Monitoring
Proceedings of ACACES 2009 Poster Abstracts: Advanced Computer Architecture and Compilation for Embedded Systems, Academia Press, Ghent, 2009
RIS, BibTex
O. Mattes, F. Nowak, R. Buchty, and W. Karl
Augmenting the Curriculum targeting Hardware-aware System Design
CDNLive! EMEA 2009, Cadence Design Systems, Inc., 2009
RIS, BibTex
R. Buchty, D. Kramer, F. Nowak, and W. Karl
A Seamless Virtualization Approach for Transparent Dynamical Function Mapping targeting Heterogeneous and Reconfigurable Systems
ARC2009 -- Proceedings of the 5th International Workshop on Applied Reconfigurable Computing (LNCS 5453), Springer, 2009
RIS, BibTex
R. Buchty, D. Kramer, M. Kicherer, and W. Karl
A Light-weight Approach to Dynamical Runtime Linking Supporting Heterogenous, Parallel, and Reconfigurable Architectures
Architecture of Computing Systems -- ARCS 2009, 22nd International Conference (LNCS 5455), Springer, 2009
RIS, BibTex
F. Nowak, R. Buchty, D. Kramer, and W. Karl
Exploiting the HTX-Board as a Coprocessor for Exact Arithmetics
Proceedings of the First International Workshop on HyperTransport Research and Applications (WHTRA 2009) (ISBN 978-3-00-027249-3), Universitätsbibliotek Heidelberg, 2009
URL, RIS, BibTex
D. Kramer, T. Vogel, R. Buchty, F. Nowak, and W. Karl
A general purpose HyperTransport-based Application Accelerator Framework
Proceedings of the First International Workshop on HyperTransport Research and Applications (WHTRA 2009) (ISBN 978-3-00-027249-3), Universitätsbibliotek Heidelberg, 2009
URL, RIS, BibTex
R. Buchty, M. Kicherer, D. Kramer, and W. Karl
An Embrace-and-Extend Approach to Managing the Complexity of Future Heterogeneous Systems
SAMOS '09: Proceedings of the 9th International Workshop on Embedded Computer Systems: Architectures, Modeling, and Simulation, Springer-Verlag, 2009, ISBN 978-3-642-03137-3
DOI, ISBN, RIS, BibTex
R. Buchty, D. Kramer, and W. Karl
An Organic Computing Approach to Sustained Real-time Monitoring
Proceedings of WCC2008/BICC (IFIP Vol.268) (ISBN 978-0-387-09654-4), Springer, 2008
RIS, BibTex
R. Buchty, O. Mattes, and W. Karl
Self-aware Memory: Managing Distributed Memory in an Autonomous Multi-Master Environment
Architecture of Computing Systems -- ARCS 2008, 21st International Conference (ISBN 978-3-540-78152-3), 2008
RIS, BibTex
F. Nowak, R. Buchty, and W. Karl
Adaptive Cache Infrastructure: Supporting dynamic Program Changes following dynamic Program Behavior
Proceedings of the 9th Workshop on Parallel Systems and Algorithms (PASA 2008) (ISBN 978-3-88579-218-5), GI e.V., 2008
RIS, BibTex
J. Tao, A. Shahbahrami, B. Juurlink, R. Buchty, W. Karl, and S. Vassiliadis
Optimizing Cache Performance of the Discrete Wavelet Transform Using a Visualization Tool
Proceedings of the 2007 IEEE International Symposium on Multimedia (ISM-07), 2007
RIS, BibTex
F. Nowak, R. Buchty, and W. Karl
A Run-time Reconfigurable Cache Architecture
Proceedings of the ParaFPGA-Symposium (Parallel Computing with FPGAs), 2007
RIS, BibTex
H.-P. Löb, R. Buchty, and W. Karl
A Network Agent for Diagnosis and Analysis of Real-time Ethernet Networks
International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES 2006) (ISBN 1-59593-543-6), ACM Press, New York, 2006
RIS, BibTex
R. Buchty, J. Tao, and W. Karl
Automatic Data Locality Optimization through Self-Optimization
Self-Organising Systems: First International Workshop (IWSOS2006), LNCS4124 (ISBN 3-540-37658-5), Springer Verlag, Berlin--Heidelberg, 2006
RIS, BibTex
R. Buchty and W. Karl
A Monitoring Infrastructure for the Digital on-demand Computing Organism (DodOrg)
Self-Organising Systems: First International Workshop (IWSOS2006), LNCS4124 (ISBN 3-540-37658-5), Springer Verlag, Berlin--Heidelberg, 2006
RIS, BibTex
R. Buchty and W. Karl
A Monitoring Infrastructure for the Digital on-demand Computing Organism (DodOrg)
Advanced Computer Architecture and Compilation for Embedded Systems (ACACES 2006) (ISBN 90-382-0981-9), Academia Press, Ghent, 2006
RIS, BibTex
R. Buchty
Reconfigurable Architectures and Instruction Sets: Programmabilty, Code Generation, and Program Execution
Proceedings of the Dagstuhl Seminar 06141 ``Reconfigurable Architectures'', 2006
RIS, BibTex
G. Acher, R. Buchty, and C. Trinitis
CPU-independent Assembler in an FPGA
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL05) (ISBN 0-7803-9362-7), IEEE CS, 2005
RIS, BibTex
R. Buchty, G. Acher, J. Jeitner, W. Karl, J. Tao, and C. Trinitis
ASoCS: An Architecture Concept for Self-optimizing Parallel and Distributed Computer Systems
PARS Workshop Proceedings, GI/ITG, 2005
RIS, BibTex
R. Buchty, N. Heintze, and D. Oliva
Modelling Cryptonite: On the Design of a Programmable High-Performance Crypto Processor
PARS Newsletter #2 (ISSN 0177-0454), 2004
RIS, BibTex
R. Buchty, N. Heintze, and D. Oliva
A Programmable Crypto Processor Architecture for High-Bandwidth Applications
ARCS2004 International Conference on Architecture of Computing Systems Proceedings (LNCS2981) (ISBN 3-650-21238-8), 2004
RIS, BibTex
R. Buchty, N. Heintze, and D. Oliva
Modelling Cryptonite: On the Design of a Programmable High-Performance Crypto Processor
ARCS2004 Organic and Pervasive Computing Workshop Proceedings (LNI P-41) (ISBN 3-88579-370-9), 2004
RIS, BibTex
D. Oliva, R. Buchty, and N. Heintze
AES and the Cryptonite Crypto Processor
CASES'03 Conference Proceedings, 2003
RIS, BibTex

Technical Reports


R. Buchty
Robots on the rise -- one year into the R5-COP project
ARTEMIS news, 2015
URL, RIS, BibTex

Books


R. Buchty and J.-P. Weiß
High-performance and Hardware-aware Computing, Proceedings of the First International Workshop on New Frontiers in High-performance and Hardware-aware Computing (HipHaC'11)
KIT Scientific Publishing, 2011
RIS, BibTex
R. Buchty and J.-P. Weiß
High-performance and Hardware-aware Computing, Proceedings of the First International Workshop on New Frontiers in High-performance and Hardware-aware Computing (HipHaC'08)
Universitätsverlag Karlsruhe, 2008
RIS, BibTex

Book Chapters


R. Buchty, M. Geelen, H. Sandee, and V. Beran
R5-COP: Reconfigurable ROS-based Resilient Reasoning Robotic Cooperating Systems
ARTEMIS Book of Projects Volume Three, ARTEMIS Joint Undertaking, 2014
RIS, BibTex
D. Kramer, R. Buchty, and W. Karl
Monitoring and Self-awareness for Heterogeneous, Adaptive Computing Systems
Organic Computing — A Paradigm Shift for Complex Systems (10.1007/978-3-0348-0130-0_10), Springer Basel, 2011, ISBN 978-3-0348-0130-0
URL, ISBN, RIS, BibTex

Theses


R. Buchty
Cryptonite -- A Programmable Crypto Processor Architecture for High-Bandwidth Applications
TU München, 2002
URL, RIS, BibTex

Patents


R. Buchty, N. Heintze, and D. P. Oliva:
USPTO S/N 7,577,819: Vector Indexed Memory Unit and Method
2009
RIS, BibTex
R. Buchty, N. Heintze, and D. Oliva
USPTO S/N 7,299,338: Vector-indexed Memory Unit and Method
2007
RIS, BibTex
R. Buchty, N. Heintze, and D. Oliva
USPTO S/N 60/430749: Encryption Unit
2002
RIS, BibTex

  aktualisiert am 25.02.2015
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